1. Field of the Invention
The present disclosure relates to a method of etching.
2. Description of the Related Art
Technologies have been proposed for microfabrication of circuit patterns of semiconductor devices on semiconductor wafers (also referred to as “wafers”, below) by using etching apparatuses (see, for example, Patent Document 1). In Japanese Laid-open Patent Publication No. 2008-60566, a technology has been disclosed that prevents bowing when etching an insulation layer on a wafer.
However, to meet demand for even finer microfabrication in recent years, a highly precise etching process needs to be realized, for which it has become important for such a process to maintain in-plain uniformity of etching executed on a wafer, and at the same time, to increase selectivity that represents a ratio of etching a mask with respect to etching a film to be etched (referred to as the “mask selectivity”, below).